Integrated circuits (ICs) have been pivotal to accelerating progress in electronic device performance, enabling device sizes to shrink without sacrificing performance. ICs have been widely adopted for electronic devices, as opposed to designs using discrete transistors, due to various capabilities that are enabled by the ICs. For example, ICs can be readily mass produced, generally exhibit excellent reliability, and enable a building-block approach to circuit design.
ICs generally include a semiconductor substrate including a device, such as an interconnected field effect transistor (FET), disposed thereon and therein defining a device region. A FET includes a gate electrode structure as a control electrode and spaced apart active areas, e.g., source and drain electrodes, between which a current can flow. A control voltage applied to the gate electrode structure controls the flow of current through a channel region between the source and drain electrodes. Typically, modern ICs contain millions of such transistors.
Layers of dielectric materials are formed over the semiconductor substrate including over the device region(s). The ICs may include additional devices such as metal resistors that are embedded in the dielectric materials above the semiconductor substrate. During fabrication of the ICs, electrical connections to the transistors and metal resistors or other additional devices that are embedded in the IC are generally formed for purposes of completing electrical routing in the circuit. The electrical connections between the devices in the IC are formed in the layers of dielectric materials through known techniques of selectively etching through the layers to form vias that uncover contact surfaces of the devices, followed by filling the vias with an electrically-conductive material to form the electrical connections. Often, configurations of the transistors and the metal resistors are such that direct paths through the layers of dielectric materials for via formation are at different levels within the IC. While it would be desirable to minimize fabrication steps by efficiently forming vias simultaneously to the various contact surfaces of the transistors and metal resistors, these devices are usually at different levels and the contact surfaces that are to be uncovered by the respective vias correspondingly lie on different, parallel planes within the IC. Because etchings generally proceed at constant rates for via formation, “via punch-through” often occurs at shallower contact surfaces, especially when the shallower contact surface includes a metal resistor surface that is typically formed of a thin resistive metal-containing layer. “Via punch-through” refers to propagation of the via completely through the thin resistive metal-containing layer. Via punch-through results in ineffective electrical connection upon subsequent filling of the vias with electrically-conductive material, and may compromise the integrity of the IC by etching through the layers that are not intended to be etched.
Accordingly, it is desirable to provide integrated circuits and methods of forming integrated circuits that enable relatively efficient formation of electrical connections to transistors and metal resistors within the integrated circuit while avoiding via punch-through. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and this background.